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New Publication

Phase-Biased Andreev Diffraction Grating

M. R. Lykkegaard, A. E. Dahl, K. Flensberg, T. Lindemann, M. J. Manfra, C. M. Marcus,

arXiv:2411.13355 (2024).

(a) Schematic of the three-wire (M = 3) device, with
superconducting wires (light blue) connected to a remote su-
perconducting meander. Multiple phase-sensitive transmissions, Ο„i, and retroreflections, ri, contribute to overall lo-
cal and nonlocal conductances. (b) False-color micrograph
showing three-wire device and circuitry. Scale bar is 1 Β΅m.
(c) Zoomed-out false-color micrograph showing the Al meander with three downward phase taps and two upward cur-
rent taps. (d) Cross section along red dashed line in (b), showing heterostructure and fabrication layers.

New Publication

Local and Nonlocal Transport Spectroscopy in Planar Josephson Junctions

Phys. Rev. Lett. 130, 096202 (2023).

We report simultaneously acquired local and nonlocal transport spectroscopy in a phase-biased planar Josephson junction based on an epitaxial InAs/Al hybrid two-dimensional heterostructure. Quantum point contacts at the junction ends allow measurement of the 2 x 2 matrix of local and nonlocal tunneling conductances as a function of magnetic field along the junction, phase difference across the junction, and carrier density. A closing and reopening of a gap was observed in both the local and nonlocal tunneling spectra as a function of magnetic field. For particular tunings of junction density, gap reopenings were accompanied by zero-bias conductance peaks (ZBCPs) in local conductances. End-to-end correlation of gap reopening was strong, while correlation of local ZBCPs was weak. A simple, disorder-free model of the device shows comparable conductance matrix behavior associated with a topological phase transition. Phase dependence helps distinguish possible origins of the ZBCPs.
Device and measurement setup.False-color micrograph of a representative device showing three-terminal configuration. Meandering perforations etched onto the superconducting leads allow partial depletion of the semiconductor using gate voltage 𝑉SC. Al loop allows phase biasing of the junction with a small out-of-plane magnetic field 𝐡βŠ₯. An in-plane magnetic field, 𝐡βˆ₯ is applied parallel to the 𝑆-𝑁 interfaces. Voltage biases 𝑉T and 𝑉B are applied to the top and bottom Ohmic contacts through the current amplifiers (CA). Gates 𝑉top⁑(bot) and 𝑉T⁑(B)⁒QPC form QPCs at the junction ends. 𝑉1 controls carrier density in the junction. All connections to the device are via ∼1–2  k⁒Ω fridge wires and filters, see Supplemental Material for details.
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